On conventional computers, the performance of AI models is limited by the data transfer between the memory and the processor. Compute-in-Memory architectures offer a new paradigm: Vector-Matrix Multiplications may be performed by a voltage drop through a matrix of programmable resistances, the “synaptic weights”. Ferroelectric materials are excellent candidates for their realization: in a two- or three-terminals geometry and in combination with a semiconducting oxide,[1–3] the conductance is programmed by controlling the configuration of the ferroelectric domains.
The unique fluorite unit cell of HfZrO4 allows for the stabilization of ferroelectricity below 3 nm,[6] facilitating the scaling of synaptic weights. The mechanisms governing the resistive switching in WOx / HZO-SL (5 nm) bilayers are discussed. The effect of the programming pulse duration and amplitude on the polarization switching are investigated, from milliseconds to nanoseconds timescales. Devices of different sizes and shapes are measured down to 500 nm in dimension. For an octagonal device size of 1 micrometer, an On/Off ratio as high as 8 is obtained for 20 ns pulses, a 4-fold improvement compared to 40 um devices.
The relatively low crystallization temperature of polycrystalline hafnium oxide / zirconium oxide superlattices (HZO-SL) is compatible with the Back-End-Of-Line (BEOL) of CMOS transistors.[7,8] These results not only demonstrate the functionalization of the BEOL with synaptic weights, but also pave the way for the integration of ferroelectric field-effect transistors with Beyond CMOS semiconductors.
You can download the slides of Laura’s talk here (PDF).
References:
[1] L. Bégon-Lours, M. Halter, F. M. Puglisi, L. Benatti, D. F. Falcone, Y. Popoff, D. D. Pineda, M. Sousa, B. J. Offrein, Advanced Electronic Materials 2022, 2101395.
[2] M. Halter, L. Bégon-Lours, V. Bragaglia, M. Sousa, B. J. Offrein, S. Abel, M. Luisier, J. Fompeyrine, ACS Appl. Mater. Interfaces 2020, 12, 17725.
[3] M. Halter, L. Bégon-Lours, M. Sousa, Y. Popoff, U. Drechsler, B. J. Offrein, COMMUNICATIONS MATERIALS 2023, 4, DOI 10.1038/s43246-023-00342-x.
[4] S. Boyn, J. Grollier, G. Lecerf, B. Xu, N. Locatelli, S. Fusil, S. Girod, C. Carrétéro, K. Garcia, S. Xavier, J. Tomas, L. Bellaiche, M. Bibes, A. Barthélémy, S. Saïghi, V. Garcia, Nature Communications 2017, 8, 14736.
[5] M. Halter, E. Morabito, A. Olziersky, C. Carrétéro, A. Chanthbouala, D. F. Falcone, B. J. Offrein, L. Bégon-Lours, Journal of Materials Research 2023, 38, 4335.
[6] L. Bégon-Lours, M. Halter, M. Sousa, Y. Popoff, D. D. Pineda, D. F. Falcone, Z. Yu, S. Reidt, L. Benatti, F. M. Puglisi, B. Offrein, Neuromorph. Comput. Eng. 2022, 2, DOI 10.1088/2634-4386/ac5b2d.
[7] L. Bégon-Lours, S. Slesazeck, D. F. Falcone, V. Havel, R. Hamming-Green, M. M. Fernandez, E. Morabito, T. Mikolajick, B. J. Offrein, Advanced Electronic Materials 2024, n/a, 2300649.
[8] R. Hamming-Green, M. S. Ram, D. F. Falcone, B. Noheda, B. J. Offrein, L. Bégon-Lours, in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), IEEE, Bangalore, India, 2024, pp. 1–3.
Location: Stuckelberg, Ecole de Physique
Time: Tuesday 29 October 2024, 12:30 for pizza, 13:00 start discussion